Design Verification Engineer (Data Fabric Verification Engineer)

Data Fabric verification engineer: 5 to 20 years of experience PREFERRED EXPERIENCE: Architected and developed complex verification environments in SystemVerilog, including scripting using Perl, Ruby, Make, or the likes. Exposure to RTL design, software development, formal verification, or other related domains. Good understanding of computer organization/architecture. Experience or familiarity with formal tools and/or functional verification tools by VCS, Cadence, Mentor Graphics KEY RESPONSIB…